1. Field of the Invention
This invention relates to a liquid crystal display (LCD), and more particularly to a liquid crystal display device wherein a change in a charge rate of a thin film transistor is compensated in a frequency variation applied from the exterior thereof upon driving of the liquid crystal display device so as to improve a picture quality. The present invention also is directed to a method of driving said liquid crystal display device.
2. Description of the Related Art
Generally, a liquid crystal display device has an inherent resolution corresponding to the number of integrated pixels, and has a higher resolution as its dimension becomes larger. In order to display a high quality of picture, makers of the liquid crystal display device increase a pixel integration ratio within a liquid crystal panel among liquid crystal display devices having the same dimension for the purpose of differentiating the resolution.
The standards of image signals and control signals in the case of a personal computer, etc., including the liquid crystal display device along with the resolution were established by the Video Electronics Standard Association (VESA) in February 1989.
The typical standards of display devices being commercially available in the current display industry include DOS Mode (640×350, 640×400, 720×400), VGA (640×400), SVGA (800×600), XGA (1024×768), SXGA (1280×1024) and UXGA (1600×1200) Modes, etc.
The LCD has a resolution fixed depending on the number of arranged pixels and hence requires image signals conforming to a resolution of the liquid crystal display panel and control signals for the image signal from the system. Accordingly, the system converts image signals and control signals corresponding to various display standards into image signals and control signals complying with a resolution and a display standard of the LCD using a scaler chip and the like and applies the same to the LCD.
FIG. 1 is a block diagram showing a configuration of the conventional LCD. In FIG. 1, an interface 10 receives data (e.g., RGB data) and control signals (e.g., an input clock, a horizontal synchronizing signal, a vertical synchronizing signal and a data enable signal) and applies them to a timing controller 12. A low voltage differential signal (LVDS) interface and a transistor transistor logic (TTL) interface, etc., have been mainly used for data and control signal transmission to the driving system. All of such interfaces are integrated into a single chip along with the timing controller 12.
The timing controller 12 uses a control signal input via the interface 10 to produce control signals for driving a data driver 18 consisting of a plurality of driver ICs (not shown) and a gate driver 20 consisting of a plurality of gate driver ICs (not shown). Also, the timing controller 12 transfers data input from the interface 10 to the data driver 18.
The data driver 18 selects reference voltages in accordance with the input data in response to control signals from the timing controller 12 to convert the same into an analog image signal and applies the converted signal to a liquid crystal panel 22. The gate driver 20 performs an on/off control of gate terminals of thin film transistors (TFTs) 23 (i.e.,switching devices) arranged on the liquid crystal panel 22, one scan line 24 at a time, in response to the control signals input from the timing controller 12. Also, the gate driver 20 allows the analog image signals from the data driver 18 to be applied to each pixel connected to each TFT 23 via a data line 25.
A direct current (DC) voltage to DC voltage converter 14 applies a gate high voltage (Vgh) for driving the TFTs within the liquid crystal display panel 22 to the gate driver 20, and generates a common electrode voltage Vcom for the liquid crystal display panel 22 to apply it to the gate driver 20. The standards of said voltages are established by a manufacturer on the basis of the transmissivity to voltage characteristic of the panel.
However, the LCD also has employed various display formats from the VGA class to the UXGA class. Signals input to the timing controller differ depending on the various display formats. In other words, a main clock or a frame frequency input to the interface is different depending on various display formats set in accordance with the resolution. Accordingly, a charge characteristic of the TFT provided within the liquid crystal display panel becomes different, and hence flicker and gray scale characteristics, etc. becomes different, to thereby change a picture quality.
This will be described by an example shown in FIG. 2. In FIG. 2, when a gate high voltage (Vgh) applied to the TFT has a constant value of 18V, a common voltage Vcom also has a constant value of 5V and a frame frequency is changed from 50 Hz to 60 Hz, a charge time T of the TFT is decreased from 22 μs (T1) to 18 μs (T2) and, at the same time, a gate voltage width Gw is decreased from Gw1 to Gw2. Thus, a data pulse applied to the TFT fails to reach a saturation state to cause a discharge. Therefore, the TFT fails to make a sufficient discharge to reduce the charge rate and generate a variation in a picture quality.
As described above, the conventional LCD applies a constant high voltage Vgh and a constant common electrode voltage Vcom from the DC to DC voltage converter to the TFT's provided within the liquid crystal display panel even though a main clock or a frame frequency differ in accordance with various display formats set depending on the resolution that is input thereto. Thus, a charge rate of the TFT is changed and a flicker, etc. is generated, to thereby cause a deterioration of picture quality.